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Speaker-Yury Illarionov

Yury Illarionov
Institute for Microelectronics (TU Wien)

Yury Illarionov was born in Saint-Petersburg in 1988. He received the B.Sc. and M.Sc. degrees from St.-Petersburg State Polytechnical University (Russia) in 2009 and 2011, respectively. Also, in 2012 he received a double M.Sc. from Grenoble INP (France) and University of Augsburg (Germany). He also visited IRCELYON (France, 2011) and SIMTech (Singapore, 2012). In 2015 he received the Ph.D. degree from Ioffe Physical-Technical Institute (Russia) and Dr.techn. degree from TU Wien (Austria). He also contributed to about 60 journal papers and conference abstracts. Currently, Dr. Yury Illarionov is with Ioffe Physical-Technical Institute and Institute for Microelectronics (TU Wien). His scientific interests are centered around reliability of 2D FETs.

Title:Encapsulated MoS2 FETs with Improved Performance and Reliability
SymposiumStrategic Frontier
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Abstract

Considerable progress in the fabrication of MoS2 FETs has been demonstrated recently. However, available device prototypes still suffer from a sizable hysteresis of the ID-VG characteristics and long-term drifts of threshold voltage Vth, known as bias-temperature instabilities (BTI). As such,these issues must be addressed prior to commercialization of MoS2 technologies.

Here we report on the improvement of the properties of MoS2/SiO2(25 nm) FETs introduced by the encapsulation with high-quality Al2O3(15 nm) based on a modified recipe of. The Ion/Ioff ratio of these devices is as high as 109 (Fig.1a), which is already close to predicted values. At the same time,the hysteresis is two orders of magnitude smaller than in bare exfoliated devices (Fig.1b). Furthermore,positive BTI (PBTI) in encapsulated CVD devices is weakly pronounced (Fig.1c), which is importantfor MoS2 n-FETs. Quite remarkably, PBTI is weaker than in previously reported exfoliated bareMoS2/SiO2, stacked MoS2/hBN and encapsulated BP/SiO2 FETs (Fig.1d). The reason for the reduced hysteresis and BTI, as well as for the improved device performance, is that the encapsulation layer efficiently protects the device from adsorbent-type trapping sites on top of the MoS2 channel. 

Overall, we conclude that encapsulation of MoS2 FETs strongly improves their reliability andperformance, making this an important technological step toward reaching commercial quality standards. 



Reference:

[1] P. Bolshakov et al, Microelectron. Eng., 178 (2017) 190. [2] Y. Guo et al, Appl. Phys. Lett., 108 (2015)103109. [3] Yu.Yu. Illarionov et al, 2D Mater., 3 (2016) 035004. [4] K. Cho et al, ACS Nano, 7 (2013) 7751. [5]K.K.H. Smithe et al, 2D Mater., 4 (2017) 011009. [6] M.J. Mleczko et al, ACS Nano, 10 (2016) 7507. [7] Y.Yoon et al, Nano Lett., 11 (2011) 3768. [8] Yu.Yu. Illarionov et al, ACS Nano, 10 (2016) 9543. 



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Abstract: Minyang Lu

Sponsor: Wenyang Yang

Media: Liping Wang

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